ASE Technology (SPIL)
SPIL provides TSMC-licensed CoWoS-S advanced packaging for Nvidia Blackwell chips and is co-developing next-gen CoWoP packaging. Handles ~80K of Nvidia's ~595K annual CoWoS wafers, a meaningful share of ASE/SPIL's advanced packaging business.
Provides advanced packaging (CoWoS-S licensed) for Nvidia Blackwell chips; SPIL expanding US packaging capacity in Arizona as part of Nvidia's domestic supply chain
Notes
Jensen Huang attended SPIL Taichung facility opening January 2025. SPIL holds TSMC-licensed CoWoS-S technology. Named partner for US packaging expansion alongside Amkor. Primary source is trade press (Digitimes); SPIL is ASE subsidiary.
Milestones
- Jensen Huang opens SPIL facility, cementing CoWoS advanced packaging partnership
Jensen Huang personally inaugurated SPIL's Taichung TTIP facility, confirming SPIL as a dedicated advanced packaging partner for Nvidia AI GPUs using TSMC-licensed CoWoS-S technology.
→ www.aseglobal.com - SPIL named Nvidia US packaging partner alongside Amkor for domestic supply chain
SPIL confirmed as a named partner for Nvidia's US IC backend capacity expansion, with SPIL expanding Arizona packaging facilities as part of Nvidia's effort to build domestic AI chip supply chains.
→ www.digitimes.com - SPIL leads development of CoWoP next-generation packaging for Nvidia
As TSMC's CoWoS-L/S reaches full booking, SPIL takes the lead on CoWoP (Chip-on-Wafer-on-PCB) development for Nvidia, potentially handling next-gen packaging needs beyond current CoWoS technology.
→ www.trendforce.com